NEWS: Intel reveals Nehalem, Larrabee, Dunnington details
Intel announced some more info on some upcoming projects today and this press release has some of the details revealed in a press briefing. Among them are some hints about Dunnington, the company's upcoming six-core server part; Nehalem, the next-generation architecture that will supplant Core 2 processors later this year; and Larrabee, Intel's forthcoming discrete graphics processor. Starting with Dunnington, the upcoming processor will feature six cores, 16MB of L3 cache, and a staggering 1.9 billion transistors. Dunnington's six cores will all be Core 2-based, and the processor will slip into the same Caneland platform as today's Socket 604, Xeon 7300-series CPUs. Interestingly, Dunnington appears to be a single-die product, unlike Intel's four-core offerings that are just two dual-core dies tacked together on the same package. When asked in the Q&A session why Intel had chosen six cores instead of eight, Gelsinger said Intel wanted to balance the number of cores with the amount of cache and the chip's cost envelope. A "detailed set of workload characterizations" led the company to conclude that six cores with 16 megs of L3 cache is the "sweet spot." Dunnington shipments are due some time in the second half of the year.
The Nehalem architecture will succeed the Core microarchitecture that's at the heart of most Intel CPUs today, and we've known for a while that it will bring several major enhancements, like the addition of an integrated memory controller and the QuickPath point-to-point interconnect (the answer to AMD's HyperTransport). Nehalem will feature a three-channel DDR3 memory controller with support for DDR3 speeds as high as 1333MHz. The triple-channel controller will appear on both desktop and server/workstation offerings, and it will support three memory modules per channel. Using current 2GB DDR3-1333 modules, that means you'd be able to cram 18GB of RAM into a single desktop PC and yield a theoretical maximum of 31.99GB/s of bandwidth. Interestingly, Nehalem chips will only feature 256KB of L2 cache per core and 8MB of L3 cache per chip. That's a little on the light side compared to Intel's existing 45nm quad-core parts, which have 12MB of L2 cache (one shared 6MB L2 cache per die). AMD's upcoming 45nm quad-core offerings, for reference, will have 512KB of L2 cache per core and 6MB of L3 cache per chip. Intel expects Nehalem to hit production in the fourth quarter of this year
With plans for the first demonstrations later this year, the Larrabee architecture will be Intel's next step in evolving the visual computing platform. Larrabee will combine a large array of Intel Architecture (i.e. x86) cores with a brand-new cache architecture, a new vector instruction set (Intel wouldn't comment on Larrabee's relationship with AVX), and a new vector processing unit. Intel claims Larrabee's programmable architecture will allow it to accelerate anything from high-definition video and audio processing to physics, artificial intelligence, and global illumination. Larrabee will be compatible with DirectX and OpenGL application programming interfaces. In other words, while Intel will be pushing for different rendering paradigms like ray tracing, the company won't have to wait on developers to make its silicon useful to gamers - Larrabee should be able to run existing games. Larrabee's design could also make it well-suited to the hybrid rasterization/ray tracing approaches advocated by folks like John Carmack and Nvidia Chief Scientist David Kirk
