Flexible, portable, performant structures of bit fields in C++
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Thread: Flexible, portable, performant structures of bit fields in C++

  1. #1
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    Post Flexible, portable, performant structures of bit fields in C++

    I've written a header file (bitfield.h) that provides structures of bit fields as a template/macro library:

    https://github.com/wkaras/C-plus-plu...ary-bit-fields.

    It is more portable and flexible, and has comparable performance to the bit field feature of the base language. At least, the code optimization looks good using gcc, I'm not able to check with VC++. For example, to xor 33 into a bitfield:

    BITF(My_descriptor, my_target, sub_struct.some_field) ^= 33;

    It's possible to directly access bit fields in device registers, including device registers accessed using inp/outp. This works even when device registers are accessed indirectly, via a register address and read/write buffer combo.

  2. #2
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    Hi, thanks for your git. However, here is a point:
    "G++ uses more than 3GB of memory (I estimated 6, although I couldn't be sure as the memory monitor stopped working the moment thrashing started). CLang++ only uses up to 1.4 GB of memory although it can take 3-5 minutes too and use up one core fully (ensure you have proper cooling)."

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